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The I2C bus was designed by Philips in the early 80 to allow easy communication between components which reside on the same circuit board. Philips Semiconductors migrated to NXP in 2006. Sometimes the bus is called IIC or I²C bus. This has features  like :  Only two bus lines are required No strict baud rate requirements like for instance with RS232, the master generates a bus clock Simple master/slave relationships exist between all components Each device connected to the bus is software-addressable by a unique address I2C is a true multi-master bus providing arbitration and collision detection Operation: The I2C bus uses two lines called Serial Clock Line (SCL) and Serial Data Lines (SDA). Both lines are pulled high via a resistor (Rpu) as shown in Figure below. The interface uses 8 bit long bytes, MSB (Most Significant Bit) first, with each device having a unique address. Any device may be a Transmitter or Receiver, and a Master or Slave. The Slave is any device addressed by t

24LC512 is a 64K x 8 (512 Kbit) Serial EEPROMs(Electrically Erasable), from Microchip Technology Inc. (see the product page) . It has been developed for advanced, low-power applications such as personal communications and data acquisition. This device also has a page write capability of up to 128 bytes of data. This device is capable of both random and sequential reads up to the 512K boundary. Functional address lines allow up to eight devices on the same bus, for up to 4 Mbit address space. This is an example how to interface 24XXX EEPROMs with 8051. Best way is t0 use SDCC as C Compiler. the abobe schematic will be sufficient .  sample code  &    header  Datasheet - 24LC512 [pdf]